| 摘要 |
PROBLEM TO BE SOLVED: To provide a controller and a method for an active termination resistor which can perform on/off control of the active termination resistor of DRAM regardless of operation mode of DRAM mounted on a memory module. SOLUTION: A buffer circuit included in a memory circuit is equipped with a signal input terminal, a synchronous input buffer having an input terminal connected to the signal input terminal, an asynchronous input buffer having an input terminal connected to the signal input terminal, and a switching circuit outputting selectively an output signal from the synchronous input buffer or the output signal from the asynchronous input buffer according to the operation mode in the memory circuit. A device and method for controlling the active termination resistor can minimize the data bubble as they can perform on/off control of the terminal resistor regardless of the operation mode of the delay synchronous loop or the phase synchronous loop. COPYRIGHT: (C)2003,JPO
|
