| 摘要 |
PROBLEM TO BE SOLVED: To improve memory using efficiency and flexibility in the design of the circular buffer of an integrated circuit. SOLUTION: This dual mode address generator comprises inputs that receive a current address A, an address offset M, a buffer length L, and a control signal; and logic configured to compute a first memory address for a buffer with an implied lower boundary and a second memory address for a buffer with an implied higher boundary response to the A, M, and L. One of the first and second memory addresses is provided in response to the control signal. The first memory address corresponds the current address A plus the address offset M for a first circular buffer having an implied lower address boundary X and including addresses X through (X+L), and the second memory address corresponds the current address A plus the address offset M for a second circular buffer having an implied higher address boundary Y and including addresses Y through (Y-L). COPYRIGHT: (C)2003,JPO
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