| 摘要 |
PROBLEM TO BE SOLVED: To provide a new semiconductor integrated circuit device equipped with a memory circuit, a high speed memory, and a mass storage memory circuit which enable speed-up and facilitate setup of timing. SOLUTION: In a read circuit of a memory cell in which a memory current is made to flow or not in accordance with a selection operation of a word line and storage information, gates are supplied to a plurality of bit lines connected by the above memory cells respectively. A first amplifier circuit includes a first MOSFET of a first conductive type which is maintained at off-state under a pre-charge voltage given to such bit lines and is made to an operation state corresponding to a selection signal of a bit line. A second amplifier circuit which includes a plurality of a second MOSFET of a second conductive type to which a plurality of such amplifier signals of the first amplifier circuit are supplied to each gate and connected in parallel mode, and forms amplifier signals corresponding to the amplifier signals of the above first amplifier circuit. COPYRIGHT: (C)2003,JPO
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