发明名称 |
Method to modify 0.25 mum 1T-RAM by extra resist protect oxide (RPO) blocking |
摘要 |
A method to fabricate a 1T-RAM device, comprising the following steps. A semiconductor substrate having an access transistor area and an exposed bottom plate within a capacitor area proximate the access transistor area is provided. A gate with an underlying gate dielectric layer within the access transistor area are formed. The gate and underlying gate dielectric layer having sidewall spacers formed over their respective exposed side walls. A top plate with an underlying capacitor layer over the bottom plate within the capacitor area are formed. The top plate and underlying capacitor layer having sidewall spacers formed over their respective exposed side walls. A patterned resist protect oxide (RPO) layer is formed over at least the drain of the structure not to be silicided. Metal silicide portions are formed over the structure not protected by the RPO layer.
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申请公布号 |
US2003148576(A1) |
申请公布日期 |
2003.08.07 |
申请号 |
US20020323098 |
申请日期 |
2002.12.18 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY |
发明人 |
HUANG CHING-KWUN;CHEN CHIH-CHANG;PENG HSIEN-CHIH;CHIN PIN-SHYNE |
分类号 |
H01L21/44;H01L21/8238;H01L21/8242;(IPC1-7):H01L21/823 |
主分类号 |
H01L21/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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