| 摘要 |
<p>The scale of a function selector circuit is reduced by providing a controller which can change both the rise/fall characteristics of a signal waveform outputted from an output buffer and the logic threshold value in an input buffer in accordance with the logic level of a common node signal fed optionally. A coupling circuit includes a first transistor of depression type, thereby to lower the voltage level of a signal inputted to a second circuit and to reduce the undesired current flowing through a transistor included in the second circuit and exhibiting the GIDL characteristics. The layout of an output circuit is optimized by coupling the output buffer and the output driver through signal lines which are formed by using an upper layer where a memory cell array is formed.</p> |
