发明名称 |
ANALOG-DIGITAL CONVERSION APPARATUS |
摘要 |
For example, an A/D conversion apparatus having an 8−bit resolution is divided into a most significant bit converter (1<sb>−1</sb>) and a least significant bit converter (1<sb>−2</sb>), so that A/D conversion is performed on 4−bit basis. Thus, by reducing the number of conversion bits in each of the converters (1<sb>−1</sb>, 1<sb>−2</sb>), it is possible to reduce the number of uses of circuit elements such as a comparator and a voltage dividing resistor and reduce the size of a circuit such as an encoding circuit.
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申请公布号 |
WO03065589(A1) |
申请公布日期 |
2003.08.07 |
申请号 |
WO2002JP13480 |
申请日期 |
2002.12.25 |
申请人 |
NEURO SOLUTION CORP.;KOYANAGI, YUKIO;SAKAI, YASUE |
发明人 |
KOYANAGI, YUKIO |
分类号 |
H03M1/14;(IPC1-7):H03M1/14 |
主分类号 |
H03M1/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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