发明名称 LOW-OVERHEAD PROCESSOR INTERFACING
摘要 The present invention relates to a method and system for performing a data trans-fer between a shared memory (16) of a processor device (10) and a circuitry (20) connected to the processor device (10), wherein the data transfer is performed by triggering a DMA transfer of the data to the processor device, adding the DMA transfer to a transaction log, and providing the transaction log to the processor device, when the transaction log has reached a predetermined depth limit. The processor device is then informed of the DMA transfer of the transaction log, so as to be able to validate the transferred data. Thereby, significant background data movement can be provided without introducing high core overheads at the proces-sor device (10).
申请公布号 WO03065234(A1) 申请公布日期 2003.08.07
申请号 WO2001EP15347 申请日期 2001.12.27
申请人 NOKIA CORPORATION;BEALE, JOHN 发明人 BEALE, JOHN
分类号 G06F13/28;(IPC1-7):G06F13/28 主分类号 G06F13/28
代理机构 代理人
主权项
地址