发明名称 |
APPARATUS AND METHOD FOR TESTING CHIP |
摘要 |
PURPOSE: An apparatus and a method for testing a chip are provided to minimize the defective proportion of a semiconductor package by testing the short circuit of a wire, the opening state of the wire, and the leak current of the wire after a die bonding process or a wire bonding process. CONSTITUTION: An apparatus for testing a chip includes a loading unit, a test unit, and an unloading unit. The loading unit is used for loading a strip PCB(Printed Circuit Board). The test unit is used for testing the strip PCB by checking the short circuit of a wire, the opening state of the wire, and the leak current of the wire. The unloading unit is used for unloading the strip PCB by separating the strip PCB according to a decision result of the test unit. The apparatus for testing the chip further includes a marking unit(526) and a host system. The marking unit is used for marking a bad mark to indicate the bad state of the strip PCB. The host system is used for driving the marking unit.
|
申请公布号 |
KR20030064924(A) |
申请公布日期 |
2003.08.06 |
申请号 |
KR20020004995 |
申请日期 |
2002.01.29 |
申请人 |
YUIL SEMICON CO., LTD. |
发明人 |
BANG, SIN HAN;CHOI, GYU HUN;KIM, HAK DONG;LEE, JONG SEOK |
分类号 |
H01L21/66;(IPC1-7):H01L21/66 |
主分类号 |
H01L21/66 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|