| 摘要 |
A speech recognition circuit comprises an input buffer for receiving processed speech parameters. A lexical memory 23 contains lexical data which comprises a plurality of lexical tree data structures. Each lexical tree data structure comprises a model of words having common prefix components, An initial component of each lexical tree structure being unique. A plurality of lexical tree processors 21 are connected in parallel to the input buffer to perform parallel lexical tree processing for word recognition by accessing the lexical data in the lexical memory. A results memory 25 stores processing results from the lexical tree processors 21 and lexical tree identifiers to identify lexical trees to be processed by the lexical tree processors 21. A controller 27 controls the lexical tree processors 21 to process lexical trees identified in the results memory 25 by performing parallel processing on a plurality of said lexical tree data structures. |
