发明名称 METHOD FOR FABRICATING MOS TRANSISTOR HAVING NOTCHED GATE ELECTRODE
摘要 PURPOSE: A method for fabricating a MOS transistor having a notched gate electrode is provided to form easily the notched gate electrode by using a damascene process for filling a stepped opening portion. CONSTITUTION: A multi-layered insulating layer including two-layered insulating layers is formed on a substrate(300). An opening portion is formed by patterning the multi-layered insulating layer. An upper width of the opening portion is wider than a lower width of the opening portion. A gate insulating layer(365) is formed on the exposed substrate. A gate electrode(370) is formed on the gate insulating layer in order to fill the opening portion. A notch region(375) is formed at a lower portion of an edge of the gate electrode by removing the multi-layered insulating layer. The multi-layered insulating layer is formed by stacking an upper molding layer and a lower molding layer.
申请公布号 KR20030064958(A) 申请公布日期 2003.08.06
申请号 KR20020005052 申请日期 2002.01.29
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JUNG, GONG SU;KANG, HUI SEONG
分类号 H01L21/28;H01L21/336;H01L29/423;H01L29/51;H01L29/78;(IPC1-7):H01L21/336 主分类号 H01L21/28
代理机构 代理人
主权项
地址