METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT HAVING MULTILAYER WIRING STRUCTURE

摘要

In a method for fabricating an LSI in which primitive devices such as transistors are formed on a semiconductor substrate and a plurality of interconnect layers are formed thereover to provide sub-circuits of successively larger scale and increasing complexity including sub-circuits which are formed by a connection of the primitive devices and sub-circuits of a larger scale which are formed by a connection of the sub-circuits, under a condition that an intermediate interconnect layer is formed, an exhaustive test, a functional test, a stuck-at fault test, a quiescent power supply current test or the like takes place with respect to the primitive devices or the sub-circuits which are wired together by the intermediate interconnect layer, and subsequently, a wiring connection test takes place after the formation of each subsequent interconnect layer. A fault coverage is improved while a testing cost and a fabricating cost are reduced.