发明名称 Method and apparatus for reduction of noise sensitivity in dynamic logic circuits
摘要 A method and apparatus for protecting dynamic logic circuits from the effects of noise at the inputs to the dynamic logic circuits is disclosed. Parallel current flow or evaluate paths which couple an output node through a common node to a low voltage or ground rail include extra transistors in the current flow or evaluate path to allow the inputs to be protected while maintaining the operation and integrity of the circuit.
申请公布号 US6603333(B2) 申请公布日期 2003.08.05
申请号 US20000731327 申请日期 2000.12.05
申请人 FUJITSU LIMITED 发明人 VINH JAMES;SRIVASTAVA PRANJAL;GRONDALSKI ROBERT S.;NAINI AJAY
分类号 H01L27/04;H01L21/822;H03K17/16;H03K17/687;H03K19/096;(IPC1-7):H03K19/96 主分类号 H01L27/04
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