发明名称 |
Power semiconductor device for power integrated circuit device |
摘要 |
Provided is a DAD that improves resistance to latch-up and stabilizes breakdown voltage characteristic. Specifically, a first gate electrode (10) and a second drain electrode (13) are linear electrodes having a length not exceeding the length of a source electrode (9). An isolation region (20) is disposed on both end portions of these electrodes. The region surrounded by two isolation regions (20) and the source electrode (9) becomes a P channel MOS region (PR) where a P channel MOS transistor is to be formed. The isolation region (20) has a multi-trench structure that a plurality of trenches (21) are provided in a P type impurity region disposed so as to be rectangle as viewed in plan configuration. Each trench (21) is filled with a conductor such as polysilicon, and the filled conductor is disposed so that it makes no electrical contact with any specific part.
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申请公布号 |
US6603176(B2) |
申请公布日期 |
2003.08.05 |
申请号 |
US20010835445 |
申请日期 |
2001.04.17 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
AKIYAMA HAJIME |
分类号 |
H01L21/76;H01L21/762;H01L21/8238;H01L27/08;H01L27/088;H01L27/092;H01L29/06;H01L29/40;H01L29/786;(IPC1-7):H01L27/12 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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