发明名称 Power supply rejection ratio optimization during test
摘要 A regulated voltage supply circuit having improved power supply rejection ratio is achieved. The circuit comprises, first, a voltage follower having an input, an output, and a power supply voltage. The input is coupled to a reference voltage. The output comprises the regulated voltage supply. Second, a means of compensating noise on the power supply voltage comprises phase shifting the power supply voltage 180 degrees and feeding back the phase shifted power supply voltage to the voltage follower input to thereby improve power supply rejection ratio. The means of compensating noise may comprise an adjustable gain. This adjustable gain may further comprise an adjustable value resistance. The adjustable gain is used in a to optimize the PSRR by testing comprising modulating noise on the power supply voltage, measuring the noise on the regulated voltage supply, and adjusting the gain.
申请公布号 US6603293(B2) 申请公布日期 2003.08.05
申请号 US20010996257 申请日期 2001.11.28
申请人 DIALOG SEMICONDUCTOR GMBH 发明人 KNOEDGEN HORST
分类号 G05F1/46;H03F1/26;H03F3/45;(IPC1-7):G05F1/40;G06G7/12 主分类号 G05F1/46
代理机构 代理人
主权项
地址