发明名称 Multi-protocol conversion assistance method and system for a network accelerator
摘要 Systems and methods for assisting multiple protocol conversion in a network accelerator. A network device includes a transmit processing engine, a receive processing engine and one or more memories, each memory including one or more buffers for storing packets. When a packet is received, the receive engine adds a 4, 8, 12 or 16-byte tag to the front of the packet on a per-VC basis and stores the packet to a buffer. Additionally, the receive engine is able to add an offset to the starting address of the packet in the buffer relative to the beginning of the buffer. When a packet is to be transmitted, the transmit engine is able to transmit the packet from an address that is offset from the starting address of the buffer by one or more bytes. Additionally, the transmit engine is able to add one of several predefined packet headers on a per-packet basis.
申请公布号 US6603768(B1) 申请公布日期 2003.08.05
申请号 US19990344672 申请日期 1999.06.25
申请人 INTEL CORPORATION 发明人 BLESZYNSKI RYSZARD;CHONG SIMON;STELLIGA DAVID A.;HUANG ANGUO TONY
分类号 G06F9/46;H04L12/24;H04L12/56;H04L29/06;H04L29/12;H04Q11/04;(IPC1-7):H04L12/28 主分类号 G06F9/46
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