发明名称 |
Frequency locked loop speed up |
摘要 |
A method in a communication circuit recovers a clock signal. A voltage controlled oscillator is initialized by supplying a predetermined.number of pulses to a charge pump coupled to the voltage controlled oscillator so as to initialize the voltage controlled oscillator to near an operating frequency upon power up of . the clock recovery circuit.
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申请公布号 |
US6603299(B1) |
申请公布日期 |
2003.08.05 |
申请号 |
US20020165018 |
申请日期 |
2002.06.07 |
申请人 |
3COM CORPORATION |
发明人 |
HUDSON BREWSTER T.;ZORTEA ANTHONY EUGENE |
分类号 |
H03L7/087;H03L7/10;H03L7/14;H04L7/00;H04L7/033;(IPC1-7):G01R23/02 |
主分类号 |
H03L7/087 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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