| 摘要 |
The present invention provides a method for fabricating a compliant microelectronic device package and an associated apparatus for substantially obviating thermal, compliancy and interconnection problems. Flexible, dielectric layers are used having on a first surface a plurality conductive leads which are each electrically coupled at a first end to at least one conductive pad also coupled to the first surface of the dielectric layers. A second end of the conductive leads are further coupled between the dielectric layers across a bonding gap. A compliant layer is then coupled to the bottom surface of the dielectric layers. One of the dielectric layers is coupled to the surface of a die by one of the compliant layer such that the die bond pads are juxtaposed with respective leads in the bonding gap. This assembly is attached to a protective structure and is encapsulated. A solder mask may be placed over the exposed surface of the dielectric layers to cover the leads and prevent shoring. Further, a conductive layer may be used in the package as a ground layer of a voltage reference layer.
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