发明名称 Method of designing wiring for power sources in a semiconductor chip, and a computer product
摘要 In a higher layer, power source wiring is provisionally provided between a logic-decided functional block and the logic-undecided functional block. Then, a resistor network of the power source wiring within the logic-undecided functional block is prepared by assuming that a current source has been connected to a power source terminal of the logic-undecided functional block. A resistor network of a total power source wiring in the higher layer is prepared by using this local resistor network. An optimum width of the power source wiring is determined by analyzing this resistor network. Based on the width, the power source wiring of the higher layer is rewired.
申请公布号 US6604229(B2) 申请公布日期 2003.08.05
申请号 US20010812552 申请日期 2001.03.21
申请人 FUJITSU LIMITED 发明人 SUZUKI KENJI;BANNO KOJI;OSAJIMA TORU;YONEDA TAKASHI;NAWA TAKANORI;TSUNETO KOJI;INUI MASUO;YAMAMOTO HIROYUKI
分类号 G06F17/50;H01L21/82;(IPC1-7):G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址