| 摘要 |
<p>A plurality of memory cells have their sources and drains formed integrally with n+-buried layers acting as first data lines in a semiconductor substrate. The n+-buried layers are connected with second data lines through transfer MISFETs. These transfer MISFETs have their gates made of the same layer of polycrystalline silicon as that of the floating gates of memory cells and are shunted at each predetermined number of bits by Al lines having a lower resistance than that of the polycrystalline silicon. The aforementioned memory cells are made by a method comprising the steps of: forming over a semiconductor substrate sequentially the first gate insulating film, a first conductor layer for the floating gate electrode, an insulating film having at least its uppermost layer of a silicon nitride film for the second gate insulating film, and a damage preventing film of a silicon oxide film; patterning the silicon oxide film, the insulating film and the first conductor layer in a stripe shape; and forming, by ion implantation, an n+-buried layer extending in a first direction by using the stripe-patterned silicon oxide film as a mask. As a result, the second gate insulating film can be prevented from having its quality degraded by the damage of the ion implantation.</p> |
