发明名称 |
Semiconductor integrated circuit device |
摘要 |
A semiconductor device is arranged by having a shield/planarization portion including a silicided active region formed on the main surface of a semiconductor substrate and a non-active region provided by device-isolation on the surface, and a metal layer such as a pad, wiring layer or inductor having a predetermined pattern, formed on an interlayer insulation film formed on the above shield/planarization portion. Just under the metal layer is disposed the shield/planarization portion in which the area ratio of the active region to the non-active region is given in a predetermined proportion and the active region is electrically grounded.
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申请公布号 |
US2003141501(A1) |
申请公布日期 |
2003.07.31 |
申请号 |
US20020193150 |
申请日期 |
2002.07.12 |
申请人 |
KOMURASAKI HIROSHI;YAMAMOTO KAZUYA;SATOH HISAYASU;WAKADA HIDEYUKI |
发明人 |
KOMURASAKI HIROSHI;YAMAMOTO KAZUYA;SATOH HISAYASU;WAKADA HIDEYUKI |
分类号 |
H01L27/04;H01L21/02;H01L21/82;H01L21/822;H01L23/522;H01L23/552;H01L27/08;(IPC1-7):H01L29/40 |
主分类号 |
H01L27/04 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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