| 摘要 |
PURPOSE: A memory system controlling system and method is provided to perform a read/write operation at a memory device by increasing the number of a system clock so that it can reduce the number of the memory devices without lowering a bandwidth of a system bus and a system performance. CONSTITUTION: The system comprises a control register(320), a data separation/integration module(330), a clock number increasing device(350), and a burst memory control engine(340). The control register(320) stores data necessary for a control operation. The data separation/integration module(330), installed between a system bus and the burst memory device(310), separates one data from the system bus, increases the separated data, and transmits the increased data to the burst memory device(310) in a case of a write operation mode. The data separation/integration module(330) takes the increased data from the burst memory device(310), integrates the increased data into one data, and transmits the integrated data to the system bus in a case of a read operation mode. The clock number increasing device(350) increases the number of the clocks by using the data stored at the control register(320), and transmits the increased clock signals to the data separation/integration module(330) for synchronizing the data bus of the burst memory device(310) with the system data bus. The burst memory control engine(340) generates control signals for controlling the control register(320), the data separation/integration module(330) and the burst memory device(310).
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