| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a data reception system with high reliability which is increased by minimizing data detection errors due to such as waveform distortion on a transmission path when a reception circuit receives data sent from a transmission circuit. <P>SOLUTION: Data signals and clock signals are input from the transmission circuit 1 to a detector 5 and a variable delay circuit 6 in the reception circuit 4, respectively via the transmission paths 3, 4 connected in parallel. The variable delay circuit 6 varies the delay time in accordance with a delay control signal, calculates a bit error rate (BER) for each delay time, and sets the optimum delay time for a detection timing of the detector 5 to minimize the BER. <P>COPYRIGHT: (C)2003,JPO |
