发明名称 Phase locked loop circuit and optical communications receiving apparatus
摘要 A clock generator is configured to generate, on the basis of an oscillation frequency clock of a voltage-controlled oscillator, a first signal having a phase the same as the oscillation frequency clock, a second signal having a phase delayed by a first phase amount to the first signal and a third signal having a phase delayed by a second phase amount to the first signal. A phase detection circuit is configured to provide a phase control on the basis of a phase difference between the third signal and an input signal. A frequency detection circuit is configured to sample the first and second signals in synchronism with the input signal, thereby performing a frequency control for the voltage-controlled oscillator on the basis of the sampled signals.
申请公布号 US2003142775(A1) 申请公布日期 2003.07.31
申请号 US20030352162 申请日期 2003.01.28
申请人 TAKESHITA TORU;NISHIMURA TAKASHI 发明人 TAKESHITA TORU;NISHIMURA TAKASHI
分类号 H03D13/00;H03L7/08;H03L7/087;H03L7/089;H03L7/091;H03L7/113;H04L7/033;(IPC1-7):H03D3/24 主分类号 H03D13/00
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