发明名称 |
PROTECTIVE TAPE AND PEELING METHOD THEREFOR |
摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a protective tape with which occurrence of defective wafers caused by the masking tape is suppressed. <P>SOLUTION: A protective tape 1 comprises a base material 2 and an adhesive layer 3. Slits 4 are formed like a lattice shape on one side of the base material 2. The slits 4 are formed at even intervals. Since the slits 4 are formed like the lattice shape, the base material 2 has square protruding parts 2a arrayed like a matrix. The adhesive layer 3 is formed on a top surface of the protruding part 2a. The protective tape 1 is formed roundly. A wafer 6 has boundary line 5 between chips. The protective tape 1 is so stuck on the wafer 6 that the slit 4 and the boundary line 5 make an angle of about 45 degrees. <P>COPYRIGHT: (C)2003,JPO</p> |
申请公布号 |
JP2003218191(A) |
申请公布日期 |
2003.07.31 |
申请号 |
JP20020010670 |
申请日期 |
2002.01.18 |
申请人 |
FUJITSU LTD;FUJITSU VLSI LTD |
发明人 |
MURATA AKIHIKO |
分类号 |
C09J7/02;C09J5/00;H01L21/68;H01L21/683;(IPC1-7):H01L21/68 |
主分类号 |
C09J7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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