| 摘要 |
PROBLEM TO BE SOLVED: To facilitate a logical synthesis by preventing a gate from being concentrated at a path from one arbitrary buffer to a buffer by commonly providing the path for processing to rotate. SOLUTION: An ASIC 10 includes an input port FIFO 12 having an n-bit input buffer, an image data rotation processing means 13 having an n×n buffer used to rotate 90°of main scanning n×sub-scanning n bits, an output port FIFO 11 having an n-bit output buffer, and a means for writing the writing direction in the n×n buffer from above to below or from below to above in a sub-scanning direction. When data is transferred from the port FIFO 12 to the n×n buffer, the writing direction in the n×n buffer at an input time is written from above to below in the sub-scanning direction, and the writing direction is written from below to above at an output time. Thus, even when the image data to be input in the n×n buffer is input from below in the sub- scanning direction, the bit is rotated at 90°by using a common path. COPYRIGHT: (C)2003,JPO
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