| 摘要 |
The invention relates to a transmitter output stage for a two-wire bus, which output stage imposes equal but opposed currents on the two wires (7, 8) of the bus and has a first voltage source (5) for supplying voltage, a second voltage source (6) for controlling the equal but opposed currents and for generating data bits on the bus wires (7, 8), and two PNP transistors (1, 2) whose bases are driven by the second voltage source (6) and which both generate equal collector currents of which one (I1) is fed to the first bus wire (7) and a second (IT1) is fed to an input of a current mirror circuit (3, 4) that, at the output end, imposes on the second bus wire (8) a current of equal size but opposite sign to the current (I1) fed to the first bus wire (7).
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