发明名称 |
Digital video decoder for decoding digital high definition and/or digital standard definition television signals |
摘要 |
Methods and apparatus for reducing the complexity of decoder circuitry and video decoder memory requirements are disclosed. The described video decoders are capable of decoding HDTV pictures at approximately the resolution of standard definition television pictures and can be used to decode HDTV and/or SDTV pictures. The described video decoder may be used as part of a picture-in-picture decoder circuit for providing picture-in-picture capability without providing multiple full resolution video decoders. The reduction in decoder circuit complexity is achieved through the use of a plurality of data reduction techniques including the use of a preparser, downsampling, and truncating pixel values. <IMAGE> |
申请公布号 |
EP1209916(A3) |
申请公布日期 |
2003.07.30 |
申请号 |
EP20020000220 |
申请日期 |
1995.10.10 |
申请人 |
HITACHI LTD. |
发明人 |
BOYCE, JILL MACDONALD;PEARLSTEIN, LARRY |
分类号 |
H04N7/30;G06T3/40;G06T9/00;G11B5/008;G11B15/12;G11B15/18;G11B15/467;H03M7/00;H04N5/44;H04N5/45;H04N5/46;H04N5/7826;H04N7/015;H04N7/24;H04N7/26;H04N7/36;H04N7/46;H04N7/50;H04N9/804;H04N9/82;H04N21/231;H04N21/2343;H04N21/236;H04N21/2662;H04N21/431;H04N21/432;H04N21/434;H04N21/438;H04N21/4402;H04N21/462 |
主分类号 |
H04N7/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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