| 摘要 |
In a matched filter, a plurality of data holding circuits (11, 12, ..., 1256) adapted to sequentially hold a plurality of straight binary data and a plurality of correlators (81, 82, ..., 8256) are provided. Each of the correlators receiving one bit of a known code (61, 62, ..., 6256) and one bit of a selected code (71, 72, ..., 7256) as a 2-bit code outputs the straight binary data as it is when the 2-bit code is "00", outputs the straight binary data after logically inverting when the straight binary data when the 2-bit code is "11", and outputs exclusive OR values between the straight binary data except for its most significant bit and the most significant bit while outputting "1" for the most significant bit when the 2-bit code is one of "01" and "10". Also, an adder (9) adds output signals of the correlators and outputs an addition result as a correlation value (COR3). <IMAGE> |
