发明名称 Side channel attack prevention in data processing apparatus
摘要 A data processing method is provided for calculating a multiple k of a data item P using an iterative b^w-ary (base b to-the-power w) window algorithm with arbitrary window size. Preferably this is implemented as an iterative binary left-to-right "double-and-add"-type algorithm with a window size of two. A choice of data items is provided that comprises at least one multiple of P (S1). For a particular iteration of the algorithm, the multiple of P required for that iteration, for use in the "add" part of the algorithm, is determined (S2-2). A multiple is then selected from the choice in dependence upon the required multiple and an adjustment indicator is set in dependence upon the relation between the required multiple and the selected multiple (S2-2). In the subsequent iteration, the requires multiple is determined in dependance upon the adjustment indicator from the previous iteration (S2-2). The multiplier used in the "double" part of the algorithm (S2-1) is 4 in the preferred binary embodiment. The algorithm is stated to find particular application in avoiding Differential Power Analysis (DPA) and attacks on encrypted smartcards which use Elliptic Curve Cryptography (ECC).
申请公布号 GB0314927(D0) 申请公布日期 2003.07.30
申请号 GB20030014927 申请日期 2003.06.26
申请人 SHARP KABUSHIKI KAISHA 发明人
分类号 G06F21/06;G06F7/72;G06F21/00;G06K19/073;H04L9/10 主分类号 G06F21/06
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