发明名称 Input/output device having dynamic delay
摘要 Disclosed is an input/output (IO) device for transmitting a data bit signal. In one embodiment, the IO device includes an IO device input node for receiving an input data bit signal, an IO device output node, and a common ground node. The IO device also includes a first driver having first and second n-channel FETs coupled together, first and second p-channel FETs coupled together, a plurality of third n-channel or p-channel FETs each having a drain coupled to the IO device input node, and a plurality of first capacitors coupled between the common ground node and respective sources of the plurality of third n-channel or p-channel FETs. The drains of the first p-channel FET and the second n-channel FET are coupled to the IO device output node, while the gate of the first n-channel FET is coupled to the IO device input node.
申请公布号 US6600348(B1) 申请公布日期 2003.07.29
申请号 US20020159881 申请日期 2002.05.30
申请人 SUN MICROSYSTEMS, INC. 发明人 YU SHIFENG JACK;ROMANO FABRIZIO;KHIEU CONG Q.
分类号 H03K19/003;(IPC1-7):H03K3/00 主分类号 H03K19/003
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