发明名称 |
D/A converter having capacitances, tone voltage lines, first switches, second switches and third switches |
摘要 |
Provided is a D/A converter circuit which copes with high-bit digital signals and has favorable linearity and small occupation area. In a capacitive divider type DAC, capacitances are simply provided in a one-to-one relationship correspondingly to lower order bit digital signals instead of providing capacitances one-to-one correspondingly to bits. In a reset period, voltages having a height corresponding to higher order bit digital signals are provided to one electrodes (first electrodes) of the capacitances thereby charging the capacitances. In a write period, voltages having a height corresponding to lower order bit digital signals are provided to the other electrodes (second electrodes) of the capacitances thereby charging the capacitances.
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申请公布号 |
US6600436(B2) |
申请公布日期 |
2003.07.29 |
申请号 |
US20020106924 |
申请日期 |
2002.03.25 |
申请人 |
SEMICONDUCTOR ENERGY LABORATORY CO., LTD, |
发明人 |
TANAKA YUKIO |
分类号 |
H03M1/68;H03M1/76;H03M1/80;(IPC1-7):H03M1/66 |
主分类号 |
H03M1/68 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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