| 摘要 |
A cross point memory array is fabricated on a substrate with a plurality of memory cells, each memory cell including a diode and an anti-fuse in series. First and second conducting materials are disposed in separate strips on the substrate to form a plurality of first and second orthogonal electrodes with cross points. A plurality of semiconductor layers are disposed between the first and second electrodes to form a plurality of diodes between the cross points of the first and second electrodes. A passivation layer is disposed between the first electrodes and the diodes to form a plurality of anti-fuses adjacent to the diodes at the cross points of first and second electrodes. Portions of the diode layers are removed between the electrode cross points to form the plurality of memory cells with rows of trenches between adjacent memory cells to provide a barrier against crosstalk between adjacent memory cells. The trenches extend substantially to the depth of the n-doped layer in each diode. A process for fabricating the memory array includes formation of the anti-fuse above the diode in each memory cell and extending the passivation material into the trenches as the isolation material. Alternately, the diode may be formed above the anti-fuse, so that the trenches may be substantially more shallow. In addition, a process is provided for fabricating a cross point memory array having a plurality of memory cells on a substrate, each memory cell including a diode adjacent to a line electrode, including etching together in one fabrication step the boundaries extending along a first direction of each of the diodes and each of the line electrodes to form multiple rows of the diodes and the line electrodes extending in the first direction.
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