发明名称 |
Testing dielectric and barrier layers for integrated circuit interconnects |
摘要 |
An integrated circuit test system and method therefor is provided having a semiconductor substrate with an electrical ground and a source of electrical potential. A dielectric layer with first and second openings is formed on the semiconductor substrate. First and second barrier layers are deposited on the dielectric layer to line the openings. A first conductor core is deposited over the first barrier layer to fill the first opening and is connected to a source of electrical potential. A second conductor core is deposited over the second barrier layer to fill the second opening and is connected to the electrical ground. A current measuring device is provided to measure leakage current flow between the first and second conductor cores.
|
申请公布号 |
US6599835(B1) |
申请公布日期 |
2003.07.29 |
申请号 |
US20010905470 |
申请日期 |
2001.07.13 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
MARATHE AMIT P.;WOO CHRISTY MEI-CHU |
分类号 |
G01R31/12;G01R31/28;(IPC1-7):H01L21/44 |
主分类号 |
G01R31/12 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|