发明名称 Semiconductor device and manufacturing method thereof
摘要 To provide a method for manufacturing a semiconductor device, by which it is possible to form a trench or a hole with high aspect ratio on a methylsiloxane type film with low dielectric constant with causing neither via-connection failure nor short-circuit failure even when lower level interconnect is covered with etching stopper. The method comprises the processes of forming a layered film with a silicon oxide film on upper layer of a methylsiloxane type film and forming the layered film using a hard mask. When the etching stopper is etched, the silicon oxide film acts as a hard mask for the methylsiloxane type film, and transfer of faceting to the methylsiloxane type film is prevented. Thus, parasitic capacitance of multi-level interconnect can be reduced without causing via-connection failure and short failure.
申请公布号 US6599830(B2) 申请公布日期 2003.07.29
申请号 US20020187998 申请日期 2002.07.03
申请人 HITACHI, LTD. 发明人 FURUSAWA TAKESHI;KUMIHASHI TAKAO;MACHIDA SHUNTARO
分类号 H01L21/311;H01L21/312;H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L21/476;H01L21/302 主分类号 H01L21/311
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