| 摘要 |
PROBLEM TO BE SOLVED: To provide an improved DRAM based memory architecture capable of providing advantages of a SRAM (Static RAM) and realizing advantages of storage capacity and low power consumption of a DRAM (dynamic RAM) from the viewpoint of performance. SOLUTION: The memory architecture incorporates multiple banks of memory devices organized into independent channels where in each bank of memory devices contains duplicate data. When read or write requests are received at the tree memory controller, the controller checks the availability of each bank in a channel, identifies a first available bank and executes the read request from the first available bank. In response to the write request, the controller blocks all read requests after confirming that data to be written is complete for the selected memory word length. As soon as each bank queue for the read requests is empty, the controller initiates burst mode transfer of the complete data word to all banks concurrently. COPYRIGHT: (C)2003,JPO
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