PHASE CONTROL LOOP

摘要

Disclosed is a phase control loop enabling a frequency measurement operational mode for precise detection of the loop gain of the control loop, in addition to a normal operation mode, whereby a frequency divider (2) is embodied as a frequency counter with an output for current counter value read-out. A control circuit is also provided for separation of the control loop during frequency measurement and for adjusting the maximum division ratio of the frequency meter (2). Once the precise loop gain is known, a PLL circuit can be provided for modulation purposes having a high bandwith and good noise properties.