| 摘要 |
A memory cell array of a NAND-type flash memory is divided into a first and second cell arrays, and, during a read operation, a first voltage is applied to non-selected word lines of the first cell array, and a second voltage lower than the first voltage is applied, to non-selected word lines of the second cell array. The first cell array has a comparatively large write operation frequency, and therefore readily assumes an over-programmed state as a result of repeated write operations, whereas the second cell array has a comparatively small write operation frequency, and it is therefore difficult for same to assume an over-programmed state. As a result, the first voltage is made high, such that read problems are avoided even if over-programming arises, and the second voltage is made low, such that a read disturb is suppressed and a data change is avoided.
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