发明名称 Method for generating a fault signal in a voltage regulator and corresponding control circuitry for a system voltage regulator
摘要 A method for generating a fault signal in a system voltage regulator by a phase signal includes detecting the system voltage and phase signal; comparing the system voltage and phase signal with respective fault levels; and generating a fault signal upon either the system voltage or the phase signal falling below the respective fault level of the fault levels. The fault signal generating method also inhibits generating a fault signal using a drive signal of the system voltage regulator. A diagnostic circuit for a system voltage regulator is also disclosed.
申请公布号 US2003137307(A1) 申请公布日期 2003.07.24
申请号 US20020300662 申请日期 2002.11.19
申请人 STMICROELECTRONICS S.R.L. 发明人 SERRATONI CLAUDIO;GALLINARI MAURIZIO;MAGGIONI GIAMPIETRO
分类号 H02J7/14;(IPC1-7):H02H7/06 主分类号 H02J7/14
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