发明名称 DELAY CIRCUIT AND TEST APPARATUS
摘要 <p>A delay circuit for delaying an input signal with a desired delay and outputting the delayed signal. The delay circuit includes a light emitting element for emitting light according to an input signal and outputting a delay signal, a bias current source for supplying in advance a first light emitting element with a bias current smaller than a light emission threshold current of the first light emitting element, a bias current controller for controlling the bias current according to a desired delay time, a modulation current source for supplying the light emitting element with a modulation current for making the light emitting element emit light in accordance with the input signal, and a modulation current controller for controlling the modulation current in accordance with a delay resolution in the delay circuit. The modulation current controller controls the modulation current further according to a variable delay range in the delay circuit.</p>
申请公布号 WO2003061126(P1) 申请公布日期 2003.07.24
申请号 JP2003000093 申请日期 2003.01.09
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