发明名称 Image processing device
摘要 An inexpensive and simple circuit for improving an image quality of a dynamic image, with appropriate processing flexibly performed for dynamic image qualities also for a plurality of input signal sources. An image processing device comprises a memory unit having a memory region for storing images of at least one screens, a memory control unit for performing an input system operation to write image data to the memory unit on the basis of a first clock and a first image synchronizing signal and for performing an output system operation to output image data read out from the memory unit on the basis of a second clock and a second image synchronizing signal, a clock generating unit for generating the second clock, and a synchronizing control unit for inputting the second clock and for outputting the second image synchronizing signal, wherein the synchronizing control unit generates a third image synchronizing signal asynchronous to the first image synchronizing signal by dividing the second clock and a fourth image synchronizing signal with being synchronized to the first image synchronizing signal by using the second clock and selects one of the third image synchronizing signal and the fourth image synchronizing signal to output it as the second image synchronizing signal. There can be a plurality of the input image signals; if so, the synchronizing control unit generates the fourth image synchronizing signals by the number corresponding to the number of input image signals. <IMAGE>
申请公布号 EP1024663(A3) 申请公布日期 2003.07.23
申请号 EP20000300635 申请日期 2000.01.28
申请人 CANON KABUSHIKI KAISHA 发明人 SHIGETA, KAZUYUKI
分类号 G09G3/36;G09G3/291;G09G3/296;G09G5/00;H04L12/40;H04L12/64;H04N5/20;H04N5/202;H04N5/45;H04N5/66 主分类号 G09G3/36
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