| 摘要 |
An embodiment of the invention provides a circuit and method for reducing latency when a branch occurs that references a call-return stack (CRS). When an entry to a branch target address cache (BTAC) is added, a flag is set in that entry if the branch has a reference to a CRS. If the branch does not have a reference to a CRS, a flag is not set. When a branch occurs during execution of code, that branch may be associatively mapped to a previously stored branch in the BTAC. If the flag stored along with the previously stored branch is set, the code goes to the address found at the top of the CRS. If the flag is not set, the program uses the target address found in the BTAC. |
