发明名称 Integrated tessellator in a graphics processing unit
摘要 An integrated graphics pipeline system is provided for graphics processing. Such system includes a tessellation module that is positioned on a single semiconductor platform for receiving data for tessellation purposes. Tessellation refers to the process of decomposing either a complex surface such as a sphere or surface patch into simpler primitives such as triangles or quadrilaterals, or a triangle into multiple smaller triangles. Also included on the single semiconductor platform is a transform module adapted to transform the tessellated data from a first space to a second space. Coupled to the transform module is a lighting module which is positioned on the single semiconductor platform for performing lighting operations on the data received from the transform module. Also included is a rasterizer coupled to the lighting module and positioned on the single semiconductor platform for rendering the data received from the lighting module.
申请公布号 US6597356(B1) 申请公布日期 2003.07.22
申请号 US20000718890 申请日期 2000.11.21
申请人 NVIDIA CORPORATION 发明人 MORETON HENRY P.;LEGAKIS JUSTIN;ROGERS DOUGLAS H.
分类号 G06T15/00;G06T17/20;(IPC1-7):G06T17/20 主分类号 G06T15/00
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