发明名称 System and method for clock skew compensation between encoder and decoder clocks by calculating drift metric, and using it to modify time-stamps of data packets
摘要 In a coordinated computer system for encoding, transmitting, and decoding a series of data packets such as audio and/or video data, there may be a skew between the clock used by an encoder and the clock used by a decoder. In a method and device for compensating for this clock skew, the decoder calculates a drift metric representing the clock skew and modifies the time stamps of the data packets based on the drift metric. The decoder also performs a sample rate conversion on the digital data, in order to compensate for the clock skew between the encoder and decoder.
申请公布号 US6598172(B1) 申请公布日期 2003.07.22
申请号 US19990431297 申请日期 1999.10.29
申请人 INTEL CORPORATION 发明人 VANDEUSEN MARK P.;MARSHALL ROBERT A.
分类号 H04J3/06;H04N7/58;H04N7/62;(IPC1-7):G06F1/14 主分类号 H04J3/06
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