发明名称 DAMASCENE DOUBLE GATED TRANSISTORS AND RELATED MANUFACTURING METHODS
摘要 This invention provides the structure and fabrication process of a completely planar, Damascene double gated transistor. The structure has a novel self-aligned, hyper-abrupt retrograde body and a zero-parasitic, endwall gate-body connection. The structure provides for increased density and enables ultra low power to be utilized. The methods also provide for simultaneously making both four-terminal and dynamic threshold MOSFET devices.
申请公布号 KR20030061791(A) 申请公布日期 2003.07.22
申请号 KR20037003118 申请日期 2003.02.28
申请人 发明人
分类号 H01L21/336;H01L21/768;H01L21/28;H01L21/84;H01L27/12;H01L29/10;H01L29/423;H01L29/49;H01L29/51;H01L29/78;H01L29/786 主分类号 H01L21/336
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