| 摘要 |
A power detector on an integrated circuit is described. The integrated circuit has a power supply for supplying a direct current voltage. The power detector has a clamp circuit electrically connected to the power supply for generating a fixed voltage, and a startup circuit electrically connected to the power supply and the clamp circuit for generating a startup signal. When the direct current voltage increases to the fixed voltage, a voltage of an output end of the clamp circuit is increased and fixed at the fixed voltage, and then when the direct current voltage increases to a predetermined voltage, the startup circuit is driven to output the startup signal. Since the power detector can utilize MOS transistors composed of a digital integrated circuit to form its internal elements, the area occupied by the power detector is reduced and the power required by the integrated circuit is decreased.
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