发明名称 DATA INPUT CIRCUIT OF SEMICONDUCTOR DEVICE FOR MINIMIZING LOAD DIFFERENCE BETWEEN FETCH SIGNAL AND PLURAL DATA
摘要 PURPOSE: A data input circuit of a semiconductor device for minimizing a load difference between a fetch signal and plural data is provided to reduce a skew between a reference clock and the data by minimizing the load difference between the reference clock and the data. CONSTITUTION: A data input circuit(200) includes the first to the Nth latch portions(210_1 to 210_N) for latching data of N number according to a predetermined clock and a transmission bus(250) for transmitting the reference clock and the data of N number to the first to the Nth latch portions. Each latch portion have a clock buffer(231 to 23N), a data buffer(241 to 24N), dummy elements(Cd) of N-1 number, and a latch element(220_1 to 220_N). The clock buffer is used for buffering the reference clock. The data buffer is used for buffering the corresponding data of the data of N number. The dummy elements are used for receiving the remaining data except for the data inputted to the data buffer. The latch element is synchronized with an output signal of the clock buffer in order to latch the output data of the data buffer.
申请公布号 KR20030061279(A) 申请公布日期 2003.07.18
申请号 KR20020038738 申请日期 2002.07.04
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 JANG, SU BONG;KIM, GYU HYEON;SONG, HO YEONG
分类号 G11C7/10;(IPC1-7):G11C7/10 主分类号 G11C7/10
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