| 摘要 |
PURPOSE: A method for manufacturing a dual gate electrode using a damascene process is provided to be capable of solving the problems due to a selective oxidation process and improving device characteristics. CONSTITUTION: After forming a dummy nitride layer(26) at the upper portion of a semiconductor substrate(21), a plurality of holes are formed by selectively etching the dummy nitride layer for partially exposing the semiconductor substrate. A gate isolating layer(28) is formed on the exposed semiconductor substrate. A silicon layer(29) is formed on the entire surface of the resultant structure. P-type dopants are implanted in one portion of the silicon layer formed at a PMOS region, and N-type dopants are implanted in the other portion of the silicon layer formed at an NMOS region. After depositing a metal layer(32) on the resultant structure for completely filling the holes, the metal layer and the silicon layer are etched until the dummy nitride layer is exposed. Then, the dummy nitride layer is removed.
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