| 摘要 |
<P>PROBLEM TO BE SOLVED: To improve a write-in recovery time more remarkably than conventional layout and design in shared sense amplifier driver technique. <P>SOLUTION: An integrated circuit device comprising a memory cell array comprises a plurality of sense amplifiers being able to couple to the memory cells, and each of sense amplifiers has related pull-up and pull-down switching devices coupled to first and second latch nodes respectively. In a first sub-set of the plurality of sense amplifiers, their first latch nodes (e.g. latch P channel 'LP') are coupled electrically, in a second differing number sub-set of the plurality of sense amplifiers, their second latch nodes (e.g. latch N channel 'LN') are coupled electrically. <P>COPYRIGHT: (C)2003,JPO |
