发明名称 PHASE LOCK CIRCUIT AND TUNING DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To reliably suppress a reference leak over a wide frequency band and to provide satisfactory phase noise characteristics in a phase lock circuit. <P>SOLUTION: A loop filter circuit 30 for smoothing the output of a phase comparator 18 is provided, in addition to an LPF32, with a primary lag lead filter 50 composed of resistors R50 and R52 and a capacitor C52 provided with phase characteristics that a phase is temporarily delayed and then advanced as frequency increases. Thus, the reference leak can be reliably suppressed over the wide oscillation frequency band and the satisfactory phase noise characteristics can be provided. <P>COPYRIGHT: (C)2003,JPO
申请公布号 JP2003204263(A) 申请公布日期 2003.07.18
申请号 JP20010360324 申请日期 2001.11.27
申请人 SONY CORP 发明人 YAMAGUCHI TOSHIHIRO
分类号 H03J7/18;H03L7/093 主分类号 H03J7/18
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