发明名称 METHOD OF FORMING ELECTRIC POLE AND FIELD EFFECT TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To provide a method of forming a gate electric pole which can effectively narrow the gate length of the gate electric pole provided on a field effect transistor. SOLUTION: A first resist layer 12 having a first aperture portion 13 on a semiconductor substrate 11, a second resist layer 14 having a second aperture position 15 larger than the first aperture portion 13, and a first conductive layer 18 which is made of the metal having a high melting point is formed. Further, after forming a second conductive layer 19 made of the metal having a low resistance, the first conductive layer 18 inside the second aperture portion 15 is removed by etching, then the second resist layer is removed by lift off. Finally, a gate electric pole 21 is formed by removing the first resist layer 12 through ashing. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003203929(A) 申请公布日期 2003.07.18
申请号 JP20020000061 申请日期 2002.01.04
申请人 MURATA MFG CO LTD 发明人 SETO HIROYUKI;INAI MAKOTO;NAKANO HIROYUKI;OI EIJI
分类号 H01L29/417;H01L21/027;H01L21/285;H01L21/338;H01L29/423;H01L29/812;(IPC1-7):H01L21/338 主分类号 H01L29/417
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